Packaged microelectronic assemblies, such as memory chips and microprocessor chips, typically include a microelectronic die mounted to a substrate and encased in a plastic protective covering. The die includes functional features, such as memory cells, processor circuits and interconnecting circuitry. The die also typically includes bond pads electrically coupled to the functional features. The bond pads are electrically connected to pins or other types of terminals that extend outside the protective covering for connecting the die to busses, circuits, and/or other microelectronic assemblies.
In one conventional arrangement, the die is mounted to a supporting substrate (e.g., a printed circuit board), and the die bond pads are electrically coupled to corresponding bond pads of the substrate with wirebonds. After encapsulation, the substrate can be electrically connected to external devices with solder balls or other suitable connections. Accordingly, the substrate supports the die and provides an electrical link between the die and the external devices.
In other conventional arrangements, the die can be mounted to a leadframe that has conductive leadfingers connected to a removable frame. The frame temporarily supports the leadfingers in position relative to the die during manufacture. Each leadfinger is wirebonded to a corresponding bond pad of a die, and the assembly is encapsulated in such a way that the frame and a portion of each of the leadfingers extends outside the encapsulating material. The frame is then trimmed off, and the exposed portions of each leadfinger can be bent to form pins for connecting the die to external components.
Die manufacturers have come under increasing pressure to reduce the size of their dies and the volume occupied by the dies, and to increase the capacity of the resulting encapsulated assemblies. One approach to addressing these issues has been to stack multiple dies on top of each other so as to make increased use of the limited surface area on the circuit board or other element to which the dies are mounted. One drawback with some of the existing stacking techniques is that one of the dies may fail during a following-on test process. When this occurs, the entire package, including operational dies, is typically discarded because it is not practical to replace a single die within a package. Another potential drawback is that the stacked dies can occupy a significant volume in a vertical direction, which can in some cases reduce the benefits associated with stacking the dies. Accordingly, there is a need for techniques that reduce the thickness of stacked die packages, and improve the reliability of such packages.